1. Technical Field
The invention disclosed broadly relates to fault tolerant systems having spare assets on the same electronic bus and more particularly relates to a CMOS driver circuit providing cold sparing for VLSI logic circuits attached to a high speed communications bus.
2. Background Art
For fault tolerant systems such as high reliability spacecraft, it is desirable to use cold sparing where VLSI logic devices are attached to a high speed bus without power applied. The term cold spare means a redundant circuit or circuit card that is unpowered while not being used. The absence of power requirements during non-use is a critical feature of a cold spare circuit versus a warm or hot spare circuit which dissipates power while in a standby mode. The input/output interface of the cold spares must be of a high impedance or the attached bus will be corrupted by excessive loading of the bus. CMOS circuitry is desired to be used in logic devices because it provides a degree of radiation immunity and wide thresholds with low power dissipation. This same CMOS circuitry has inherent parasitic devices. Up to now, cold sparing has not been possible with full CMOS logic swings because parasitic diodes present a low impedance to the remaining system, thus corrupting the data bus and defeating the cold spare approach.